Publications


Selected publications by members of ESC.

  • "Defect-Based Reliability Analysis for Mission-Critical Software" F.Bastani, I-L Yen, V.Challagulla, 24th IEEE Computer Society International Computer Software and Applications Conference, Taiwan

  • Audio Structuring and Personalized Retrieval Using Ontologies, in Proc. of IEEE Advances in Digital Libraries, Washington, D.C., May 2000 L.Khan, D. McLeod.

  • Effective Retrieval of Audio Information from Annotated Text Using Ontologies, to appear in ACM SIGKDD Workshop on Multimedia Data Mining, Boston, MA, August 2000 L.Khan, D. McLeod.

  • Disambiguation of Annotated Text of Audio using Onologies, to appear in ACM SIGKDD Workshop on Text Mining, Boston, MA, August 2000 L. Khan,  D. McLeod.

  • "On Some Reliability Estimation Problems in Random and Partition Testing", IEEE Transactions on Software Engineering, Vol. 19, No. 7, pp. 687-697, July 1993. S. Ntafos, J. Duran and M. Tsoukalas).

  • A Probe-Based Technique to Optimize Join Queries in Distributed Internet
    Databases     in International Journal of Knowledge and Information Systems
    (KAIS) by Springer-Verlag, Volume 2, 2000, Number 3, Pages 373-385 (with
    C. Shahabi and D. McLeod).

  • "The Cost of Software Failures", Proc. of IASTED Software Engineering Conference, pp. 53-57, Nov. 1997. S. Ntafos

  • "On Random and Partition Testing", Proc. ISSTA-98 in ACM SIGSOFT Software Engineering Notes, Vol. 23, No. 2, pp. 42-48, March 1998. S. Ntafos

  • "On Comparisons of Random, Uniform, and Proportional Partition Testing", manuscript. S. Ntafos

  • Jiacun Wang, Yi Deng and Chun Jin, �Compositional modeling and performance evaluationof traffic control systems via stochastic timed Petri nets�, International Journal of Software Engineering and Knowledge Engineering, In press (December 2000).

  • J. Wang, Y. Deng and M. Zhou, �Component Time Petri Nets and Reduction Rules�, IEEE Transactions on System, Man and Cybernetics, Vol. 30, Part B, No. 4. August 2000.

  • J. Wang, G. Xu and Y. Deng. "Reachability Analysis of Real Time Systems Based on Time Petri Nets", IEEE Transactions on System, Man and Cybernetics, Vol. 30, Part B, No.5, Oct. 2000.

  • X. He and Y. Deng, "Specifying Software Architecture Connectors in SAM", International Journal on Software Engineering and Knowledge Engineering, in press, 2000.

  • J. Wang, X. He and Y. Deng, "Introducing Software Architectural Specification and Analysis in SAM through an Example", Information and Software Technology - An International Journal, Vol. 41, No. 7, 451-567, 1999.

  • Y. Deng and J. Wang, "Integrated Architectural Modeling and Analysis for High-Assurance Command and Control System Design", Annals of Software Engineering, Vol. 7, 47-70, 1999. 

  • J. Wang, M. Zhou and Y. Deng, "Modeling and Throughput Analysis of Discrete Event Systems Based on Stochastic Petri Nets", International Journal of Intelligent Control and Systems, Vol.3, No. 3, 343-358, 1999.

  • J. Wang and Y. Deng, �Incremental modeling and verification of flexible manufacturing systems�, International Journal for Intelligent Manufacturing, Vol. 10, No. 6, 485-502, 1999.  

  • Y. Deng, and C.R. Yang, �Architecture-driven modeling of real-time concurrent systems with applications in FMS�, Journal of Systems and Software, 45:61-78, 1999.  

  • Y.Deng, S.K. Chang, and X. Lin, �Executable specification and analysis for the design of concurrent object-oriented systems�, International Journal of Software Engineering and Knowledge Engineering, Vol. 4, No. 4, December 1994, 427-450.  

  • T. Znati, Y. Deng, B. Field, and S.K. Chang, �A multi-level specification and protocol simulation tool for distributed multimedia communications�, International Journal in Computer Simulation, Vol. 3, No. 4, 1993, 355-382.  

  • Y. Deng and S.K. Chang, �A framework for specification, modeling and prototyping of distributed information systems�, International Journal of Software Engineering and Knowledge Engineering, Vol.1, No.3, September 1991, 203-226.  

  • Y. Deng and S.K. Chang, �A G-Net model for knowledge representation and reasoning�, IEEE Transactions on Knowledge and Data Engineering, Vol. 2, No. 3, September 1990, 295-310  

  • K. Beznosov and Y. Deng, �Engineering application-level access control in distributed systems�, to appear in Handbook of Software Engineering and Knowledge Engineering, World Scientific Press, 2000.

  • K. Beznosov, L. Espinal and Y. Deng, �Performance considerations for a CORBA-based  application authorization service�, Proceedings of IASTED International Conference Software Engineering and Applications, Las Vegas, Nevada, November 2000.

  • J. Wang, G. Xu and Y. Deng. Reduction rules for components in SAM,  Proceedings of the Fifth International Conference on Integrated Design and Process Technology, Dallas, Texas, June, 2000

  • D. Xu and Yi Deng, �Modeling Mobile Agent Systems with High Level Petri Nets�, Proceedings of IEEE International Conference on Systems, Man and Cybernetics, 2000.

  • X. He, F. Zeng and Y. Deng, "Specifying Software Architecture Connectors in SAM", (best paper) Proceedings of 11th International Conference on Software Engineering and Knowledge Engineering, Kaiserslautern, Germany, June 1999.  

  • K. Wreder and Y. Deng, "Architecture-Centered Enterprise System Development and Integration Based on Distributed Object Technology Standard", Proceedings of 23rd IEEE COMPSAC Conference, Phoenix, USA, October 1999, 250-258.  

  • K. Beznosov, Y. Deng, et al, "A Resource Access Decision Service for CORBA-based Distributed Systems", Proceedings of IEEE Annual Computer Security Applications Conference, Phoenix, Arizona, December 1999, 310-319.  

  • K. Beznosov and Y. Deng, "A Framework for Implementing Role-based Access Control Using CORBA Security Service", Proceedings of 4th ACM Role-Based Access Control Workshop, October 1999, 19-30.  

  • J. Wang, C. Jin and Y. Deng, "Performance Evaluation of Traffic Control Systems via Stochastic Time Petri Nets", Proceedings of 23rd IEEE COMPSAC Conference, Phoenix, Arizona, October 1999, 436-441.  

  • J. Wang, C. Jin and Y. Deng, "Performance Evaluation of Traffic Control Networks via Stochastic Time Petri Nets", Proceedings of IEEE International Conference on Engineering of Complex Computer Systems, Las Vegas, Nevada, October 1999.  

  • Y. Deng, J. Wang and R. Sinha, "Incremental Architectural Modeling and Verification of Real-Time Concurrent Systems", Proceedings of 2nd IEEE International Conference on Formal Engineering Methods, Brisbane, Australia, December 1998.  

  • Y. Deng and J. Wang, "Integrated Architectural Modeling of Real-Time Systems with Applications in FMS", Proceedings of 10th International Conference on Software Engineering and Knowledge Engineering, San Francisco Bay, USA, June 1998, 34-43.

  • I.-L. Yen, F.B. Bastani, and D. Taylor, ``A systematic approach for developing fault-tolerant programs in multiple server systems,'' accepted by IEEE Trans. Software Engineering.

  • I-Ling Yen, Iftikhar Ahmed, Ramanujam Jagannath, and Sreeparna Kundu, ``The Design and Implementation of a Customizable Fault Tolerance Framework,'' Journal on Software Engineering and Knowledge Engineering, Vol. 9, 1999.

  • I-L. Yen, R. Paul, and K. Mori, ``Guest editors' introduction: Integrated design, development, and evaluation methods for high assurance systems,'' IEEE Computer, April 1998.

  • I-L. Yen and I.-R. Chen, ``Reliability assessment of multiple-agent cooperating systems,'' IEEE Trans. Reliability, Sep. 1997.

  • I-L. Yen, ``A highly safe self-stabilizing mutual exclusion algorithm,'' Information Processing Letters, 57, 1996, pp. 301-305.

  • I.-R. Chen and I.-L. Yen, ``Analysis of probabilistic error checking procedures on storage systems,'' Computer Journal, vol. 38, No. 5, 1995, pp. 348-354.

  • I.-L. Yen and F.B. Bastani, ``Parallel hashing: Collision resolution strategies and performance,'' Journal of Parallel and Distributed Computing, vol. 31, Dec. 1995, pp. 190-198.

  • I.-L. Yen, E.L. Leiss, and F.B. Bastani, ``Exploiting redundancy for performance speed-up in parallel systems,'' IEEE Parallel and Distributed Technology, Nov. 1993, pp. 51-60.

  • F.B. Bastani, I.-L. Yen, and I.-R. Chen, ``A class of inherently fault-tolerant distributed programs,'' IEEE Trans. Soft. Eng., Oct. 1988, pp. 1432-1442.

  • A. Moitra, S.S. Iyengar, F.B. Bastani, and I.-L. Yen, ``Multilevel data structures: Models and performance,'' IEEE Trans. Softw. Eng. June 1988, pp. 858-867.

  • F.B. Bastani, I.-L. Yen, and S.S. Iyengar, ``Concurrent maintenance of data structures in a distributed environment,'' The Comp. Journal, Vol. 31, No. 2, 1988, pp. 165-174.

  • I-Ling Yen, Ing-Ray Chen, and Biao Chen, ``Real-time atomic transaction processing using multi-invariant data structure,'' IEEE High Assurance Systems Engineering Symposium, Washington D.C., Nov. 1999.

  • F.B. Bastani, V.L. Winter, and I-.L. Yen, ``Dependability of relational safety-critical programs,'' IEEE Intl. Symp. on Software Reliability Engineering, Boca Raton, Florida, Nov. 1999.

  • Biao Chen, Jiang Zhang, I-Ling Yen, Bing Liu, ``Study of traffic interactions in queue sharing to support differentiated services,'' Intl. Conf. on Parallel and Distributed Computing and Systems, Cambridge, Massachusetts, Nov. 1999.

  • Farokh Bastani, Vikram Reddy, Punarvasu Srigiriraju, I-Ling Yen, ``A relational program architecture for the Bay Area Rapid Transit (BART) system,'' IEEE Conf. on High-Integrity Systems, Albuquerquq, New Mexico, Nov. 1999.

  • I-Ling Yen and Hitesh Kapoor, ``A 2-Phase N-Modular Redundancy Algorithm,'' Workshop on Object-Oriented Reliable and Dependable Systems (WORDS'99), Newport Beach, California, Jan. 1999.

  • I-Ling Yen, Iftikhar Ahmed, Ramanujam Jagannath, and Sreeparna Kundu, ``Implementation of a Customizable Fault Tolerance Framework,'' IEEE International Symposium on Object-Oriented Real-Time Distributed Computing, Kyoto, Japan, April, 1998.

  • I-L. Yen and K. Karun, ``Implementation and performance assessment of multilevel data structures,'' 21st International Computer Software and Applications Conference (COMPSAC'97), Bethesda, Maryland, August, 1997

  • I-Ling Yen, ``An Object-Oriented SNMR Framework for Dependable Systems,'' Workshop on Object-Oriented Reliable and Dependable Systems (WORDS'97), Newport Beach, California, Feb. 1997.

  • I.-L. Yen, ``Fault Tolerance via Specialization: An Efficient Approach for Tolerating General Failures,'' Intl. Design and Technology Processing Conference, Austin, Texas, Dec. 1996.

  • I.-L. Yen, ``Specialized N-Modular Redundant Processors in Large-Scale Distributed Systems,'' 15th Symposium on Reliable Distributed Systems, Niagara-on-the-lake, Ontario, Canada, Oct. 1996.

  • I.-L. Yen, ``Multiple invariant system design for fault-tolerant real-time applications,'' Workshop on Object-Oriented Real-Time Dependable Systems, Laguna Beach, California, Feb. 1996.

  • I.-L. Yen and I.-R. Chen, ``Quality assessment for multiple server cooperating systems,'' Proceedings COMPSAC, Dallas, TX, Aug. 1995, pp. 218-223.

  • I.-L. Yen and F.B. Bastani, ``A highly safe self-stabilizing mutual exclusion algorithm,'' 2nd Workshop on Self-Stabilizing Systems, Las Vegas, NV, May 28-29, 1995.

  • I.-L. Yen and F.B. Bastani, ``Robust parallel resource management in shared memory multiprocessor systems,'' International Parallel Processing Symposium, Santa Barbara, CA, April 1995, pp. 458-465.

  • I.-L. Yen and F.B. Bastani, ``On efficiently tolerating general failures in autonomous decentralized multiserver systems,'' International Symposium on Autonomous Decentralized Systems, Phoenix, AZ, April 1995, pp. 288-296.

  • I.-L. Yen and I.-R. Chen, ``A systematic approach for integration of multimedia capabilities in consulting systems,'' Pacific Workshop on Distributed Multimedia Systems, Hawaii, March 1995.

  • Y.-K. Chu, I.-L. Yen, and D. Rover, ``Guiding processor allocation with estimated execution time for mesh connected multiple processor systems,'' Hawaii International Conference on System Sciences, Hawaii, Jan. 1995.

  • I.-L. Yen, I.-R. Chen, and F.B. Bastani, ``Reliability assessment for the design of dependable soft real-time cooperating systems,'' Workshop on Object-Oriented Real-Time Dependable Systems, Oct. 1994, Dana Point, CA, pp. 134-139.

  • Y.-Y. Fang, I.-L. Yen, R.M. Dubash, ``Improving the performance of Lee's maze routing algorithm on parallel computers,'' Symposium on Parallel and Distributed Processing, Las Vegas, NV, Oct. 1994.

  • Y.-K. Chu, I.-L. Yen, and D. Rover, ``Incorporating job scheduling for processor allocation on two-dimensional mesh-connected systems,'' Symposium on Parallel and Distributed Processing, Las Vegas, NV, Oct. 1994.

  • I.-L. Yen and F.B. Bastani, ``Systematic incorporation of efficient fault tolerance in systems of cooperating parallel programs,'' 24th Intl. Symp. Fault-Tolerant Computing, Austin, TX, June 1994, pp. 154-163.

  • I.-L. Yen, M.-K. Jeng, I.-R. Chen, ``Processor allocation for parallel object-oriented programs,'' 1993 Intl. Conf. Parallel and Distributed Systems, Taipei, Taiwan, Dec. 1993, pp. 212-216.

  • I.-L. Yen and F.B. Bastani, ``Robust coordination in distributed multi-server systems,'' Workshop on Advances in Parallel and Distributed Systems, Princeton, NJ, Oct. 1993, pp. 133-138.

  • I.-L. Yen, R.M. Dubash, and F.B. Bastani, ``Strategies for mapping Lee's maze routing algorithms onto parallel architectures,'' Proceedings IPPS, Los Angeles, CA, April 1993, pp. 672-679.

  • I.-L. Yen and F.B. Bastani, ``Inherent fault tolerance in decentralized process-control systems,'' Intl. Symp. on Autonomous Decentralized Systems, Kawasaki, Japan, Mar. 1993, pp. 267-274.

  • I.-L. Yen, E.L. Leiss, and F.B. Bastani, ``A repetitive fault tolerance model for parallel programs,'' Hawaii Conf. on System Sciences, Hawaii, Jan. 1993, pp. 447-455.

  • I.-L. Yen, T. AlMarzooq, F.B. Bastani, and E.L. Leiss, ``Information hiding in parallel programs: Model and experimental evaluation on the Connection Machine,'' Symp. Frontiers of Massively Parallel Computations, McLeans, VA, October 1992, pp. 326-333.

  • R.M. Dubash, F.B. Bastani, and I.-L. Yen, ``Fault tolerant process planning and control,'' Proceedings COMPSAC, Chicago, IL, Sep. 1992, pp. 188-193.

  • I.-L. Yen and F.B. Bastani, ``Hash table in massively parallel systems,'' Proceedings IPPS, Los Angeles, CA, March 1992, pp. 660-664.

  • I.-L. Yen, E.L. Leiss, and F.B. Bastani, ``An inherently fault-tolerant sorting algorithm,'' Proceedings IPPS, Los Angeles, CA, April 1991.

  • I.-L. Yen, ``Massively parallel hash algorithms and performance,'' Proceedings CSC, San Antonio, TX, March 1991.

  • I.-L. Yen, F.B. Bastani, and E.L. Leiss, ``High performance massively parallel abstract data type components,'' Proceedings COMPSAC, Chicago, IL, Oct. 1990, pp. 196-201.

  • I.-L. Yen, D.-R. Leu, and F.B. Bastani, ``Hash table and sorted array: A case study of multi-entry data structures in massively parallel systems,'' Symp. Frontiers of Massively Parallel Computations, McLeans, VA, March 1990, pp. 51-54.

  • I.-L. Yen, F.B. Bastani, and Y. Zhao, ``On self-stabilization, nondeterminism, and inherent fault tolerance,'' MCC Workshop on Self-Stabilization, Austin, TX, August 1989.

  • F.B. Bastani and I.-L. Yen, ``A fault-tolerant replicated storage system,'' Proceedings Data Eng., Los Angeles, CA, Feb. 1987.

  • F.B. Bastani and I.-L. Yen, ``Impact of parallel processing on software quality,'' Proceedings SuperComputing Systems, Florida, Dec. 1985.

  • F.B. Bastani and I.-L. Yen, ``Analysis of an inherently fault-tolerant program,'' Proceedings COMPSAC, Chicago, IL, Oct. 1985.

  • "On Deciding Readiness and Failure Equivalences for Processes", (with Lu Tian), Information and Computation 117, pp. 193-205, 1995.

  • "Deciding Branching Bisimilarity of Normed Context-Free Processes Is in Sigma(2)", (with D. Caucal and L. Tian), Information and Computation 118, pp. 306-315, 1995.

  • "A note on the Complexity of Deciding Bisimilarity of Normed Unary Processes", (with Lu Tian), Theoretical Computer Science 131, pp. 441-448, 1994.

  • "On Deciding Some Equivalences for Concurrent Processes", (with Lu Tian), RAIRO Theoretical Informatics and Applications 27, pp. 51-71, 1994.

  • "Deciding Bisimilarity of Normed Context-Free Processes is in Sigma(2)", (with Lu Tian), Theoretical Computer Science 123, pp. 183-197, 1994.

  • "On Deciding Readiness and Failure Equivalences for Processes", (with Lu Tian), to appear in Information and Computation.

  • "On the Rearrangeability of Switching Networks Composed of Digital Symmetrical Matrices", (with Hai Nguyen), Proc. 5th Intern. Conf. on Computing and Information, pp. 155-159, Sudbury, Canada, 1993.

  • "On the Complexity of Bisimilarity of Normed Probabilistic Context-Free Processes", (with Lu Tian), Proc. 5th Intern. Conf. on Computing and Information, pp. 3-7, Sudbury, Canada, 1993.

  • "On Deciding Trace Equivalence for Processes", (with Lu Tian), Information Sciences 72, pp. 105-121, 1993.

  • "The Complexity of Deciding Code and Monoid Properties for Regular Sets", International Journal of Algebra and Computation, Vol. 2, pp. 39-55, 1992.

  • "On Some Equivalence Relations for Probabilistic Processes", (with Lu Tian), Fundamenta Informaticae 17, pp. 211-234, 1992.

  • "Non-Uniform Complexity and the Randomness of Certain Complete Languages", Theoretical Computer Science, Vol. 96, pp. 305-324, 1992.

  • "The Parallel Complexity of Coarsest Set Partition Problems", (with Sang Cho), Information Processing Letters, Vol. 42, pp. 89-94, 1992.

  • "Efficient Detectors and Constructors for Simple Languages", International Journal of Foundations of Computer Sciences, Vol. 2, pp. 183-205, 1992.

  • "The Parallel Complexity of Finite State Automata Problems", (with Sang Cho), Information and Computation, Vol. 97, pp. 1-22, 1992.

  • "The Effective Entropies of Some Extensions of Context-Free Languages", Information Processing Letters, Vol. 37, pp. 165-169, 1991.

  • "A Note on Separating Deterministic-Time-Complexity Classes, and on Almost-Everywhere Complex Sets", (with J. Geske and J. Seifera), Information and Computation, Vol. 92, pp. 97-104, 1991.

  • "Finite Automaton Aperiodicity is PSPACE-Complete", (with Sang Cho), Theoretical Computer Science, Vol. 88, pp. 99-116, 1991.

  • "Effective Entropies and Data Compression", Information and Computation, Vol. 90, pp. 67-85, 1991.

  • ``Communication Reduction in Multiple Multicasts based on Hybrid Static-Dynamic Scheduling,"
    (with D. R. Surma and P. M. Kogge) Accepted for publication in IEEE Transactions on Parallel and Distributed Systems.

  • ``Optimizing Overall Loop Schedules using Prefetching and Partitioning,''
    (with F. Chen, and T. W. O'Neil) Accepted for publication in
    IEEE Transactions on Parallel and Distributed Systems.

  • ``Efficient Acceptable Design Exploration Based on Module Utility Selection,"
    (with C. Chantrapornchai, and X. Sharon Hu) in
    IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Vol. 19, No. 1, Jan. 2000, pp. 19-29 .

  • ``Probabilistic Loop Scheduling for Applications with Uncertain Execution Time,"
    (with S. Tongsima, C. Chantrapornchai, D. Surma and N. Passos) in
    IEEE Transactions on Computers, Vol. 49, No. 1, Jan. 2000, pp. 65-80.

  • ``Properties and Algorithms for Unfolding of Probabilistic Data-flow Graphs,"
    (with S. Tongsima, T. W. O'Neil, and C. Chantrapornchai) Accepted for publication in
    Journal of VLSI Signal Processing.

  • ``Efficient Module Selections for Finding Highly Acceptable Designs based on Inclusion Scheduling,''
    (with C. Chantrapornchai, and X. S. Hu) Accepted for publication in
    Journal of Systems Architecture.

  • ``Optimizing Page Replacement for Multiple-Level Memory Hierarchy,"
    (with C. Chantrapornchai) in
    International Journal of Computers and Their Applications Vol. 6, No. 4, Dec. 1999, pp. 212-222.

  • ``Scheduling of Uniform Multi-Dimensional Systems under Resource Constraints," (with N. Passos) in
    IEEE Transactions on VLSI Systems, Vol. 6, No. 4, December 1998, pp. 719-730.

  • ``Collision Graph based Communication Scheduling for Parallel Systems,"
    (with D. R. Surma) in
    International Journal of Computers and Their Applications. Vol. 5, No. 1, March 1998.

  • ``Rotation Scheduling: A Loop Pipelining Algorithm,"
    (with L.-F. Chao and A. LaPaugh) in
    IEEE Transactions on Computer Aided Design , Vol. 16, No. 3, March 1997, pp. 229-239.

  • ``Efficient Loop Scheduling and Pipelining for Applications with Non-uniform Loops,"
    (with S. Tongsima, C. Chantrapornchai, and N. Passos) in
    IASTED International Journal of Parallel and Distributed Systems and Networks, Vol. 1, No 4, 1998, pp. 204-211.

  • ``Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop Scheduling,"
    (with S. Tongsima, C. Chantrapornchai and N. Passos) in
    Journal of VLSI Signal Processing, Vol. 18, 1998, pp. 111-123.

  • ``Communication Sensitive Loop Scheduling for DSP Applications,"
    (with S. Tongsima and N. Passos), (regular paper),
    IEEE Transactions on Signal Processing Vol. 45, No. 5, May 1997, pp. 1309-1322.

  • ``Multi-Dimensional Interleaving for Synchronous Circuit Design Optimization,"
    (with N. Passos and L.-F. Chao), (regular paper),
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 16, No. 2, February 1997, pp. 146-159.

  • ``Minimization of Memory Access Overhead for Multi-dimensional DSP Applications via Multi-level Partitioning and Scheduling,"
    (with Q. Wang and N. Passos), Accepted for publication (regular paper),
    IEEE Transactions on Circuits and Systems II. Vol. 44, No. 9, September 1997, pp. 741-753.

  • ``Hardware/Software Co-design With the HMS Framework,"
    (with M. Sheliga) (regular paper), in
    Journal of VLSI Signal Processing Systems, Vol. 13, No. 1, August 1996, pp. 37-56.

  • ``Achieving Full Parallelism using Multi-Dimensional Retiming,"
    (with N. Passos) (regular paper),
    IEEE Transactions on Parallel and Distributed Systems, Vol. 7, No. 11, November 1996, pp. 1150-1163.

  • ``Synchronous Circuit Optimization via Multi-Dimensional Retiming," (Part 1)
    (Part 2) (with N. Passos), (regular paper), in
    IEEE Transactions on Circuits and Systems, vol II - Analog and Signal Processing, Vol. 43, No. 7, July 1996, pp. 507-519.

  • ``Optimizing DSP Flow Graphs via Schedule-Based Multi-Dimensional Retiming,"
    (with N. Passos and S. C. Bass),
    IEEE Transactions on Signal Processing, Vol. 44, No. 1, January, 1996, pp. 150-156.

  • ``Optimal Data Scheduling for Uniform Multi-dimensional Applications,"
    (with Q. Wang, and N. Passos)
    IEEE Transactions on Computers, Vol. 45, No. 12, December 1996, pp. 1439-1444.

  • ``Static Scheduling for Synthesis of DSP Algorithms on Various Models," < br> (with L.-F. Chao), (regular paper)
    Journal of VLSI Signal Processing, Vol 10, pp 207-223, 1995.

  • ``Scheduling Data-Flow Graphs via Retiming and Unfolding,"
    (with L.F. Chao) in (regular paper)
    IEEE Transactions on Parallel and Distributed Systems Vol. 8, No. 12, December 1997, pp. 1259-1267.

  • ``Maintaining Bipartite Matchings in the Presence of Failures,''
    (with K. Steiglitz), (regular paper)
    Networks Journal, Vol. 23, no. 5, Aug. 1993, pp. 459-471.

  • ``Reconfigurability and Reliability of Systolic/Wavefront Arrays,''
    (with K. Steiglitz), (regular paper)
    IEEE Transactions on Computers, vol. 42, no. 7, July, 1993, pp. 854-862.

  • ``Error Detection in Arrays via Dependency Graphs,''
    (with K. Steiglitz), (regular paper)
    Journal of VLSI Signal Processing, vol. 4, no. 4, October 1992, pp 331-342.

  • Z. Yu, E. H.-M. Sha, N. Passos and R. Ju, ``Algorithms and Architecture Support for Pipelining and Scheduling Nested Loopw with Conditions," submitted to IEEE Transactions on Computers.

  • T. W. O'Neil, S. Tongsima, and E. H.-M. Sha, ``Extended Retiming: A Graph Transformation Technique for Optimal Scheduling of Data-Flow Graphs," submitted to IEEE Transactions on Parallel and Distributed Systems.

  • F. Chen, T. W. O'Neil, and E. H.-M. Sha, ``Optimizing Overall Loop Schedules using Prefetching and Partitioning,'' submitted to IEEE Transactions on Parallel and Distributed Systems.

  • ``A Fully Parallel Design Methodology for Multi-Dimensional DSP Applications," (with M. Sheliga and N. Passos) submitted to
    Journal of VLSI Signal Processing.

  • ``Efficient Polynomial-Time Nested Loop Fusion with Full Parallelism," (with N. Passos and T. O'Neil) submitted to
    IEEE Transactions on Parallel and Distributed Systems .

  • "Rapid Prototyping Implementation and Optimization based on Conceptual Specification for Fuzzy Applications," (with C. Chantrapornchai, M. Sheliga and S. Tongsima) submitted to to Journal of Fuzzy Sets and Systems.

  • D. Surma, E. H.-M. Sha and N. Passos, ``Communication Scheduling with Re-routing based on Static and Hybrid Techniques," submitted to Journal of Circuits, Systems and Computers.

Referred Conference Papers